Power factor correction device and control method thereof

ABSTRACT

Proposed are a power factor correction device and its control method capable of obtaining a stable output as the output of a power supply unit while simplifying and miniaturizing the configuration. In the power factor correction device and the control method thereof including a coil and a switching element, and a control unit for controlling ON/OFF of the switching element, provided are an input voltage detection unit for detecting an input voltage of the power factor correction device, an output voltage detection unit for detecting an output voltage, and a coil current detection unit for detecting a coil current that is generated in the coil pursuant to the ON/OFF operation of the switching element. The control unit predicts an OFF time of the switching element of each switching cycle for controlling the switching element in a critical mode based on a voltage value of the input voltage detected with the input voltage detection unit, a voltage value of the output voltage detected with the output voltage detection unit, and a current value of the coil current detected with the coil current detection unit, and controls the ON/OFF of the switching element based on the prediction result.

CROSS REFERENCES

This application relates to and claims priority from Japanese PatentApplication No. 2009-245915, filed on Oct. 26, 2009, the entiredisclosure of which is incorporated herein by reference.

BACKGROUND

The present invention relates to a power factor correction device andits control method and, for example, can be suitably applied to aswitching power supply unit of an AC/DC converter or the like.

Conventionally, as a power supply unit, broadly used is a type with apower factor collection circuit (hereinafter referred to as the “PFC(Power Factor Correction) circuit”) configured from a choke coil, aswitching element and a capacitor disposed at the subsequent stage of afull wave rectification circuit for outputting an absolute value of acommercial AC (refer to Japanese Patent Application Publication No.2007-288892).

This type of PFC circuit generates a triangle wavelike coil current inthe choke coil by subjecting the switching element to ON/OFF operationat a high frequency, performs rectification smoothing to the coilcurrent with a capacitor, corrects the input current to a sine wave ofthe same phase as the input voltage, and thereby outputs the same.

SUMMARY

Meanwhile, as an operation mode of the foregoing PFC circuit, there is acritical mode of controlling the ON/OFF of the switching element so thatthe coil current becomes “0” ampere for each repetition period of theON/OFF operation of the switching element (this is hereinafter referredto as the “switching cycle”).

When the PFC circuit is operated in the critical mode, since a zerocurrent detection circuit for detecting the timing that the coil currentbecomes “0” ampere is required, the circuit size must be enlarged byjust that much, and there were problems in terms of high cost.

Moreover, the precision of the zero current detection circuit differsbased on each product, and it is difficult to accurately detecting thetiming that the coil current becomes “0” ampere. If it is not possibleto perform control so that the coil current accurately becomes “0”ampere for each switching cycle; the operation of the PFC circuitbecomes unstable, and, consequently, there is a problem in that theoutput of the power supply unit becomes unstable.

The present invention was devised in view of the foregoing points. Thus,an object of this invention is to propose a power factor correctiondevice and its control method capable of obtaining a stable output asthe output of a power supply unit while simplifying and miniaturizingthe configuration.

In order to achieve the foregoing object, the present invention providesa power factor correction device including a coil and a switchingelement, and a control unit for controlling ON/OFF of the switchingelement. This power factor correction device comprises an input voltagedetection unit for detecting an input voltage of the power factorcorrection device, an output voltage detection unit for detecting anoutput voltage, and a coil current detection unit for detecting a coilcurrent that is generated in the coil pursuant to the ON/OFF operationof the switching element. The control unit predicts an OFF time of theswitching element of each switching cycle for controlling the switchingelement in a critical mode based on a voltage value of the input voltagedetected with the input voltage detection unit, a voltage value of theoutput voltage detected with the output voltage detection unit, and acurrent value of the coil current detected with the coil currentdetection unit, and controls the ON/OFF of the switching element basedon the prediction result.

Moreover, the present invention additionally provides a control methodof a power factor correction device including a coil and a switchingelement, and a control unit for controlling ON/OFF of the switchingelement. The power factor correction device comprises an input voltagedetection unit for detecting an input voltage of the power factorcorrection device, an output voltage detection unit for detecting anoutput voltage, and a coil current detection unit for detecting a coilcurrent that is generated in the coil pursuant to the ON/OFF operationof the switching element. The control method comprises a first step ofthe control unit predicting an OFF time of the switching element of eachswitching cycle for controlling the switching element in a critical modebased on a voltage value of the input voltage detected with the inputvoltage detection unit, a voltage value of the output voltage detectedwith the output voltage detection unit, and a current value of the coilcurrent detected with the coil current detection unit, and a second stepof the control unit controlling the ON/OFF of the switching elementbased on the prediction result.

According to the present invention, since it is possible to performpower factor correction control with a critical mode without requiring azero current detection circuit for detecting the zero point of the coilcurrent during the switching, the power factor correction device can bedownsized and, consequently, the configuration of the overall powersupply unit using the power factor correction device can be simplifiedand miniaturized.

Moreover, according to the present invention, since the power factorcorrection device can be operated stably, a stable output can beobtained since the oscillation of the output voltage of the power factorcorrection device can be suppressed.

Consequently, the present invention is able to realize a power factorcorrection device and its control method capable of obtaining a stableoutput as the output of a power supply unit while simplifying andminiaturizing the configuration.

DESCRIPTION OF DRAWINGS

FIG. 1 is a block diagram showing a schematic configuration of the powersupply unit according to an embodiment of the present invention;

FIG. 2 is a waveform diagram showing the voltage waveform and currentwaveform in the power supply unit according to an embodiment of thepresent invention;

FIG. 3 is a circuit diagram showing a configuration of the PFC circuitaccording to the first embodiment;

FIG. 4 is a waveform diagram explaining the principle of the PFC controlaccording to the first embodiment;

FIG. 5 is a block diagram showing a configuration of the control unitaccording to the first embodiment;

FIG. 6 is a block diagram showing a configuration of the PMW generationunit according to the first embodiment;

FIG. 7 is a waveform diagram explaining the operation of the PFC circuitaccording to the first embodiment;

FIG. 8 is a circuit diagram showing a configuration of the PFC circuitaccording to the second embodiment;

FIG. 9 is a waveform diagram explaining the operation of the PFC circuitaccording to the second embodiment;

FIG. 10 is a waveform diagram explaining the principle of the PFCcontrol according to the second embodiment;

FIG. 11 is a waveform diagram explaining the principle of the PFCcontrol according to the second embodiment;

FIG. 12 is a block diagram showing a configuration of the control unitaccording to the second embodiment;

FIG. 13 is a block diagram showing a configuration of the PMW generationunit according to the second embodiment; and

FIG. 14 is a circuit diagram explaining another embodiment.

DETAILED DESCRIPTION

An embodiment of the present invention is now explained with referenceto the attached drawings.

(1) First Embodiment (1-1) Configuration of Power Supply Unit of PresentEmbodiment

FIG. 1 shows the overall power supply unit 1 according to thisembodiment. The power supply unit 1 comprises an EMI (ElectroMagneticInterference) filter unit 3, a full wave rectification unit 4, a PFCunit 5, and a DC/DC conversion unit 6.

The EMI filter unit 3 eliminates noise from the AC source voltage V₁ andAC source current I₁ as shown in FIG. 2(A) which are provided from acommercial AC source 2. Moreover, the full wave rectification unit 4 isconfigured, for example, from a diode bridge, performs full waverectification to the AC source voltage V₁ and AC source current I₁, fromwhich noise has been eliminated, which are provided from the EMI filterunit 3, and outputs the thus obtained input voltage V₂ and input currentI₂ as shown in FIG. 2(B) to the PFC unit 5.

The PFC unit 5 controls the input cycle of the input current I₂throughout the entire interval so that the average value I_(LAvE) of theinput current I₂ provided from the full wave rectification unit 4becomes a sine wave as shown in FIG. 2(C), and corrects the phaseshifting between the input voltage V₂ and the input current I₂.Moreover, the PFC unit 5 smoothes the input voltage V₂ and input currentI₂ in which the phase shifting has been corrected, and outputs the thusobtained output voltage V₄ and output current I₄ as shown in FIG. 2(D)to the DC/DC conversion unit 6.

The DC/DC conversion unit 6 converts the output voltage V₄ provided fromthe PFC unit 5 into an intended DC voltage, and outputs the thusobtained DC voltage of a predetermined level to the power supplydestination (load).

(1-2) Configuration of PFC Unit

Here, the PFC unit 5 is configured from a PFC circuit 10 and a controlunit 11 as shown in FIG. 3.

The PFC circuit 10 comprises a choke coil L₁ and a reflux output diodeD₁ which are connected serially between a positive-side output terminalof the full wave rectification unit 4 and a positive-side input terminalof the DC/DC conversion unit 6, and a switching element Q₁ is connectedbetween a connection midpoint of the choke coil L₁ and the reflux outputdiode D₁, and a ground line 15 for connecting a negative-side outputterminal of the full wave rectification unit 4 and a negative-side inputterminal of the DC/DC conversion unit 6.

The switching element Q₁ is configured, for example, from a MOS-FET(Metal-Oxide-Semiconductor Field-Effect Transistor), a drain isconnected to the connection midpoint of the choke coil L₁ and the refluxoutput diode D₁, and a source is connected to the ground line 15.Moreover, a gate of the switching element Q₁ is connected to the controlunit 11.

Moreover, an output smoothing capacitor C₁ is connected between theconnection midpoint of the reflux output diode D₁ and the positive-sideinput terminal of the DC/DC conversion unit 6, and the ground line 15.

In addition, a current detector 12 for detecting the coil current I_(L)that is generated in the choke coil L₁ based on the ON/OFF operation ofthe switching element Q₁ is provided between the positive-side outputterminal of the full wave rectification unit 4 and the choke coil L₁.The current detector 12 sends the detected coil current I_(L) as a coilcurrent detection signal S₁ to the control unit 11. As the currentdetector, for example, used may be a shunt resistor, a hall element orthe like.

In addition, a first partial pressure resistor 13 configured from firstand second partial pressure resistors R₁, R₂ is connected between thepositive-side output terminal and the negative-side output terminal ofthe full wave rectification unit 4. The first partial pressure resistor13 divides the pulsating voltage V₂ output from the full waverectification unit 4 at a ratio according to the respective resistancevalues of the first and second partial pressure resistors R₁, R₂, andoutputs the thus obtained first partial pressure voltage V₁₀ to thecontrol unit 11.

Meanwhile, a second partial pressure resistor 14 configured from thirdand fourth partial pressure resistors R₃, R₄ is connected between theconnection midpoint of the reflux output diode D₁ and the outputsmoothing capacitor C₁, and the ground line 15. The second partialpressure resistor 14 divides the output voltage V₄ output from the PFCunit 5 to the DC/DC conversion unit 6 according to a ratio of therespective resistance values of the third and fourth partial pressureresistors R₃, R₄, and outputs the thus obtained second partial pressurevoltage V₁₁ to the control unit 11.

The control unit 11 generates a PWM (Pulse Width Modulation) signal S₂as shown in FIG. 7(B) as a drive signal of the switching element Q₁based on the coil current detection signal S₁ provided from the currentdetector 12, the first partial pressure voltage V₁₀ provided from thefirst partial pressure resistor 13, and the second partial pressurevoltage V₁₁ provided from the second partial pressure resistor 14, andapplies the generated PWM signal S₂ to the gate of the switching elementQ₁.

In the foregoing configuration, in the PFC unit 5, the input voltage V₂provided from the full wave rectification unit 4 is applied to the chokecoil L₁ of the PFC circuit 10, and, here, in the PFC circuit 10, theswitching element Q₁ is subject to the ON/OFF operation based on the PWMsignal S₂ provided from the control unit 11, and the choke coil L₁ isgenerated in the coil current I_(L) in a critical mode as shown in FIG.2(C) pursuant to the ON/OFF operation of the switching element Q₁.

Subsequently, the coil current I_(L) and the choke coil terminal voltage(drain-source voltage of Q₁) are subject to smoothing processing in thereflux output diode D₁ and the output smoothing capacitor C₁, andthereafter output to the DC/DC conversion unit 6.

(1-3) Configuration of Control Unit

The configuration of the control unit 11 of the PFC unit 5 is nowexplained. Prior to such explanation, the principle of the PFC controlthat is executed by the control unit 11 is foremost explained.

(1-3-1) Principle of PFC Control of Present Embodiment

In FIG. 4, FIG. 4(A) shows the coil current I_(L) that is generated inthe choke coil L₁, and FIG. 4(B) shows the sampling timing in thesampling processing to be executed by the control unit 11 for performingdigital control. Specifically, FIG. 4(B) illustrates a case of samplingthe coil current I_(L) at a timing in which half of the ON time of theswitching element Q₁ has elapsed for each sampling period.

Here, if the PFC control is stable (steady), the (n+1)-th ON timeT_(on)[n+1] of the switching element Q₁ can be assumed to beapproximately the same as the ON time T_(on)[n] of the previoussampling, and the following formula is realized.

[Formula 1]

T _(on) [n+1]=T _(on) [n]  (1)

Moreover, since the switching frequency for the PFC control is extremelyhigh in comparison to the frequency of the commercial AC, the followingformula is realized between the n-th switching cycle T_(s)[n] of theswitching element Q₁ and the (n+1)-th switching cycle T_(s)[n+1].

[Formula 2]

T_(s)[n+1]≅T_(s)[n]  (2)

Accordingly, based on Formula (1) and Formula (2) above, the followingformula is realized between the n-th OFF time T_(off)[n] of theswitching element Q₁ and the (n+1)-th OFF time T_(off)[n+1].

[Formula 3]

T_(off)[n+1]≅T_(off)[n]  (3)

Moreover, in a state where the PFC unit 5 is operating stably in thecritical mode, as also evident from FIG. 4, the following formula isrealized.

$\begin{matrix}\lbrack {{Formula}\mspace{14mu} 4} \rbrack & \; \\{{{I_{L}\lbrack n\rbrack} + {m_{1}\frac{T_{on}\lbrack n\rbrack}{2}} - {m_{2}{T_{off}\lbrack n\rbrack}}} = 0} & (4)\end{matrix}$

Note that, in Formula (4) above, m₁ represents rate of increase(inclination at the ON time T_(on)[n] of the waveform of FIG. 4) of thecoil current I_(L) at the n-th ON time T_(on)[n], and m₂ represents therate of decrease (portion in which “−” is excluded from the inclinationat the OFF time T_(off)[n] of the waveform of FIG. 4) of the coilcurrent I_(L) at the operation time (this is hereinafter referred to asthe “OFF time”) T_(off)[n] of the n-th OFF operation. Moreover, I_(L)[n]represents the actual value of the coil current I_(L) at the n-thsampling timing.

If Formula (4) is solved regarding T_(off)[n], the following formula isobtained.

$\begin{matrix}\lbrack {{Formula}\mspace{14mu} 5} \rbrack & \; \\{{T_{off}\lbrack n\rbrack} = {{\frac{1}{m_{2}}{I_{L}\lbrack n\rbrack}} + {\frac{m_{1}}{2m_{2}}{T_{on}\lbrack n\rbrack}}}} & (5)\end{matrix}$

In addition, as described above with reference to Formula (3), the n-thOFF time T_(off)[n] and the (n+1)-th OFF time T_(off)[n+1] areconsidered to be approximately the same. Thus, the (n+1)-th OFF timeT_(off)[n+1] can be represented with the following formula by usingFormula (5).

$\begin{matrix}\lbrack {{Formula}\mspace{14mu} 6} \rbrack & \; \\{{T_{off}\lbrack {n + 1} \rbrack} = {{\frac{1}{m_{2}}{I_{L}\lbrack n\rbrack}} + {\frac{m_{1}}{2m_{2}}{T_{on}\lbrack n\rbrack}}}} & (6)\end{matrix}$

Accordingly, since the (n+1)-th switching cycle T_(s)[n+1] is obtainedby adding the n-th ON time T_(on)[n] to Formula (6) above, it can berepresented with the following formula.

$\begin{matrix}\lbrack {{Formula}\mspace{14mu} 7} \rbrack & \; \\{{T_{s}\lbrack {n + 1} \rbrack} \cong {{\frac{1}{m_{2}}{I_{L}\lbrack n\rbrack}} + {( {1 + \frac{m_{1}}{2m_{2}}} ){T_{on}\lbrack n\rbrack}}}} & (7)\end{matrix}$

Meanwhile, the rate of increase m₁ of the coil current I_(L) at the n-thON time T_(on)[n] described above can be represented with the followingformula.

$\begin{matrix}\lbrack {{Formula}\mspace{14mu} 8} \rbrack & \; \\{m_{1} = {\frac{{\hat{V}}_{in}\sin \; \omega \; t}{L} = \frac{V_{in}\lbrack n\rbrack}{L}}} & (8)\end{matrix}$

Moreover, the rate of decrease m₂ of the coil current I_(L) at the n-thOFF time T_(off)[n] can be represented with the following formula.

$\begin{matrix}\lbrack {{Formula}\mspace{14mu} 9} \rbrack & \; \\{m_{2} = {\frac{V_{out} - {{\hat{V}}_{in}\sin \; \omega \; t}}{L} = \frac{{V_{out}\lbrack n\rbrack} - {V_{in}\lbrack n\rbrack}}{L}}} & (9)\end{matrix}$

However, in Formula (8) and Formula (9), V_(in) with “̂” shows the actualpeak value of the input voltage V₂ that is provided from the full waverectification unit 4 to the PFC unit 5, V_(in)[n] shows the actual valueof the input voltage V₂ at the n-th sampling timing, L shows theinductance value of the choke coil L₁, and V_(out)[n] shows the actualvalue at the n-th sampling timing of the output voltage V₄ that isoutput from the PFC unit 5 to the DC/DC conversion unit 6, respectively.

Based on Formula (6), Formula (8) and Formula (9) above, the OFF timeT_(off)[n+1] during the (n+1)-th OFF operation can be predicted with thefollowing formula.

$\begin{matrix}{\mspace{79mu} \lbrack {{Formula}\mspace{14mu} 10} \rbrack} & \; \\{{T_{off}\lbrack {n + 1} \rbrack} = {{\frac{L}{{V_{out}\lbrack n\rbrack} - {V_{in}\lbrack n\rbrack}} \cdot {I_{L}\lbrack n\rbrack}} + {\frac{V_{in}\lbrack n\rbrack}{2( {{V_{out}\lbrack n\rbrack} - {V_{in}\lbrack n\rbrack}} )} \cdot {T_{on}\lbrack n\rbrack}}}} & (10)\end{matrix}$

The (n+1)-th switching cycle T_(s)[n+1] in the foregoing case can berepresented with the following formula based on Formula (7) to Formula(9).

$\begin{matrix}{\mspace{79mu} \lbrack {{Formula}\mspace{14mu} 11} \rbrack} & \; \\{{T_{s}\lbrack {n + 1} \rbrack} = {{\frac{L}{{V_{out}\lbrack n\rbrack} - {V_{in}\lbrack n\rbrack}}{I_{L}\lbrack n\rbrack}} + {\lbrack {1 + \frac{V_{in}\lbrack n\rbrack}{2( {{V_{out}\lbrack n\rbrack} - {V_{in}\lbrack n\rbrack}} )}} \rbrack \cdot {T_{on}\lbrack n\rbrack}}}} & (11)\end{matrix}$

Accordingly, by controlling the OFF time of the switching element Q₁ sothat the switching cycle satisfies Formula (11) (that is, by controllingthe OFF time of the switching element Q₁ to satisfy Formula (10)), thePFC control can be performed in a critical mode without having to use azero voltage detection circuit.

(1-3-2) Specific Configuration of Control Unit

FIG. 5 shows the specific configuration of the control unit 11 that wascreated in consideration of the foregoing points. As evident from FIG.5, the control unit 11 is configured from an analog/digital conversionunit 20, an OFF time prediction unit 21, an ON time control unit 22, anadding circuit 23 and a PWM generation unit 24.

The analog/digital conversion unit 20 samples (analog/digital converts)the first partial pressure voltage V₁₀ provided from the first partialpressure resistor 13 (FIG. 3) and the coil current detection signal S₁provided from the current detector 12 (FIG. 3), respectively, at atiming in which half of the ON time has elapsed, based on a notificationfrom the carrier generation unit 33 (FIG. 6) of the PWM generation unit24 as described later.

The analog/digital conversion unit 20 sends the first partial pressurevoltage value W₁₀ as the sampled value of the first partial pressurevoltage V₁₀ and the coil current detection value VS₁ as the sampledvalue of the coil current detection signal S₁, which were obtained withthe foregoing sampling, to the OFF time prediction unit 21,respectively.

Moreover, the analog/digital conversion unit 20 samples the secondpartial pressure voltage V₁₁ provided from the second partial pressureresistor 14 (FIG. 3) at the same timing as the first partial pressurevoltage V₁₀ and the coil current detection signal S₁, and sends the thusobtained second partial pressure voltage value W₁₁ as the sampled valueof the second partial pressure voltage V₁₁ to the OFF time predictionunit 21 and the ON time control unit 22.

The ON time control unit 22 is configured from a reference value outputcircuit 30, a subtraction circuit 31 and a PI control unit 32, andinputs the second partial pressure voltage value VV provided from theanalog/digital conversion unit 20 to the negative-side input port of thesubtraction circuit 31.

Here, the reference voltage value VR to be taken by the second partialpressure voltage value VV₁₁ when a default voltage is output from thePFC unit 5 is provided from the reference value output circuit 30 to thepositive-side input port of the subtraction circuit 31. Consequently,the subtraction circuit 31 subtracts the second partial pressure voltagevalue VV from the reference voltage value VR, and sends the obtainedvalue as an error value VE to the PI control unit 32.

The PI control unit 32 calculates the target value of the ON time in thesubsequent sampling period according to the PI control based on theerror value VE that is provided from the subtraction circuit 31, andsends this as the ON time command value T_(on) _(—) _(com) to the OFFtime prediction unit 21, one signal input port of the adding circuit 23,and the PWM generation unit 24, respectively.

The OFF time prediction unit 21 predicts, using foregoing Formula (10),the OFF time for the critical mode control in the subsequent samplingperiod based on the first partial pressure voltage value VV₁₀, the coilcurrent detection value VS₁ and the second partial pressure voltagevalue W₁₁ provided from the analog/digital conversion unit 20, and theON time command value T_(on) _(—) _(com) provided from the ON timecontrol unit 22.

Specifically, the OFF time prediction unit 21 calculates the voltagevalue (corresponds to V_(in)[n] of Formula (10)) of the input voltage V₂that is provided from the full wave rectification unit 4 (FIG. 1) to thePFC unit 5 based on the first partial pressure voltage value W₁₀, andadditionally calculates the current value (corresponds to I_(L)[n] ofFormula (10)) of the coil current I_(L) based on the coil currentdetection value VS₁. Moreover, the OFF time prediction unit 21calculates the voltage value (corresponds to V_(out)[n] of Formula (10))of the output voltage V₄ that is output from the PFC unit 5 to the DC/DCconversion unit 6 (FIG. 1) based on the second partial pressure voltagevalue W₁₁.

The OFF time prediction unit 21 thereby calculates the OFF time(corresponds to T_(off)[n+1] of Formula (10)) of the subsequent samplingperiod according to Formula (10) based on the thus obtained voltagevalue of the input voltage V₂, the coil current value I_(L), the voltagevalue of the output voltage V₄, and the ON time command value T_(on)_(—) _(com) (corresponds to T_(on)[n] of Formula (10)) provided from theON time control unit 22. Note that the inductance L of the choke coil L₁is provided to the OFF time prediction unit 21 in advance, and the OFFtime prediction unit 21 stores and retains the inductance L in aninternal memory not shown.

Moreover, the OFF time prediction unit 21 outputs the thus obtainedprediction value of the OFF time in the subsequent sampling period asthe OFF time command value T_(off) _(—) _(com) to the other signal inputport of the adding circuit 23.

The adding circuit 23 calculates the subsequent sampling period that isprovided in foregoing Formula (11) by adding the ON time command valueT_(on) _(—) _(com) provided from the ON time control unit 22 and the OFFtime command value T_(off) _(—) _(com) provided from the OFF timeprediction unit 21, and sends the calculation result as the samplingperiod command value V_(m) to the PWM generation unit 24.

The PWM generation unit 24 is configured from a carrier generation unit33, a comparing unit 34 and an output unit 35 as shown in FIG. 6. Thecarrier generation unit 33 generates, as shown in FIG. 7(C), a trianglewavelike carrier wave CA with a peak value V_(mp) according to thesampling period command value V_(m) provided from the adding circuit 23,and sequentially sends the level value of the carrier wave CA to thecomparing unit 34 in the internal clock cycle.

Note that, in the case of this embodiment, the carrier generation unit33 is configured from a counter. The carrier generation unit 33 startscounting from zero, and, while counting up in the internal clock cycle,sequentially sends the count value to the comparing unit 34. Moreover,when the count value reaches the peak value V_(mp), the carriergeneration unit 33 thereafter sequentially sends the count value to thecomparing unit 34 while counting down. As a result of continuouslyrepeating the foregoing count processing, the carrier generation unit 33sequentially and continuously generates the carrier wave CA with thepeak value V_(mp) according to the sampling period command value V_(m)provided from the adding circuit 23.

Moreover, the carrier generation unit 33 notifies the timing that thelevel value (count value) of the carrier wave CA becomes zero (timing ofthe arrow shown in FIG. 7(D)) to the analog/digital conversion unit 20.Consequently, the analog/digital conversion unit 20 samples the firstpartial pressure voltage V₁₀, the coil current detection signal S₁ andthe second partial pressure voltage V₁₁ at the notified timing.

The comparing unit 34 compares the size of the level value of thecarrier wave CA provided from the carrier generation unit 33 in theinternal clock cycle and the ON time command value T_(on) _(—) _(com)provided from the ON time control unit 22 (FIG. 5), and sends thecomparative result to the output unit 35.

The output unit 35 subsequently generates a PWM signal S₂ as shown inFIG. 7(B) which rises to a high level during the period that the ON timecommand value T_(on) _(—) _(com) is higher than the level value of thecarrier wave CA and which falls to a low level during the period thatthe ON time command value T_(on) _(—) _(com) is lower than the levelvalue of the carrier wave CA based on the comparative result of thecomparing unit 34, and sends the generated PWM signal S₂ to the gate ofthe switching element Q₁.

Consequently, the switching element Q₁ is subject to the ON/OFFoperation based on the PWM signal S₂, and thereby generates the trianglewavelike coil current I_(L) as shown in FIG. 7(A) in the choke coil L₁.

(1-3-3) Relation of Internal Clock of Control Unit and Peak Value V_(mp)of Carrier Wave

The relation of the internal block of the control unit and the peakvalue V_(mp) of the carrier wave is now explained.

When considering that the portions of the respective triangle shapes ofthe carrier wave shown in FIG. 7(C) are all isosceles triangles and thatthe carrier generation unit 33 (FIG. 6) is a counter which counts up orcounts down in the internal clock cycle CLK, the peak value V_(mp) ofthe carrier wave in the n-th sampling period T_(s)[n] can be representedwith the following formula.

$\begin{matrix}\lbrack {{Formula}\mspace{14mu} 12} \rbrack & \; \\{{V_{mp}\lbrack n\rbrack} = \frac{{CLK} \cdot {T_{s}\lbrack n\rbrack}}{2}} & (12)\end{matrix}$

Note that, in Formula (12), CLK represents the internal clock (forexample, 150 MHz) of the control unit.

Moreover, the relation of the ON time command value T_(on) _(—)_(com)[n] at the n-th sampling period that is output from the ON timecontrol unit 22 and the ON time T_(on)[n] at such n-th sampling periodcan be represented with the following formula upon referring to FIG.7(C).

$\begin{matrix}\lbrack {{Formula}\mspace{14mu} 13} \rbrack & \; \\{{T_{{on}\; \_ \; {com}}\lbrack n\rbrack} = \frac{{CLK} \cdot {T_{on}\lbrack n\rbrack}}{2}} & (13)\end{matrix}$

Accordingly, in the case of this embodiment, the peak value V_(mp)[n+1]of the carrier wave in the (n+1)-th sampling period T_(s)[n+1] can berepresented with the following formula by using Formula (11) to Formula(13).

$\begin{matrix}\lbrack {{Formula}\mspace{14mu} 14} \rbrack & \; \\\begin{matrix}{{V_{mp}\lbrack {n + 1} \rbrack} = \frac{{CLK} \cdot {T_{s}\lbrack {n + 1} \rbrack}}{2}} \\{= {{\frac{{CLK} \cdot L}{2( {{V_{out}\lbrack n\rbrack} - {V_{in}\lbrack n\rbrack}} )}{I_{L}\lbrack n\rbrack}} +}} \\{{( {1 + \frac{V_{in}\lbrack n\rbrack}{2( {{V_{out}\lbrack n\rbrack} - {V_{in}\lbrack n\rbrack}} )}} ) \cdot {T_{{on}\; \_ \; {com}}\lbrack n\rbrack}}}\end{matrix} & (14)\end{matrix}$

(1-4) Effect of Present Embodiment

As described above, with the power supply unit 1 according to thisembodiment, the OFF time of the switching element Q₁ in the subsequentlysampling period in the case of performing the PFC control in thecritical mode is predicted based on the pulsating voltage (input voltageV₂) to the PFC unit 5 in the previous sampling period, the smoothingvoltage (output voltage V₄) from the PFC unit 5, the coil current I_(L),and the ON time of the switching element Q₁, and the ON/OFF control ofthe switching element Q₁ is performed based on the prediction result.Thus, the PFC control can be performed in the critical mode withouthaving to use a zero current detection circuit for detecting the zeropoint of the coil current I_(L). The circuit size of the PFC unit 5 canthereby be downsized and, consequently, the configuration of the overallpower supply unit 1 can be simplified and miniaturized.

Moreover, with the power supply unit 1 according to this embodiment,since the critical mode control can be performed with accuracy based onthe foregoing method, the PFC unit 5 can be operated stably.Consequently, the output voltage oscillation or output ripple of the PFCunit 5 can be suppressed, and a stable output can be obtained as theoutput of the power supply unit 1.

(2) Second Embodiment (2-1) Configuration of PFC Circuit of PresentEmbodiment

FIG. 8, which uses the same reference numerals for the portionscorresponding to FIG. 1, shows a PFC unit 40 according to the secondembodiment that is applied to the power supply unit 1 of FIG. 1 insubstitute for the PFC unit 5 according to the first embodiment. The PFCunit 40 differs from the PFC unit 5 according to the first embodiment inthat a dual interleave system is adopted as the PFC control system.

Specifically, the PFC unit 40 according to this embodiment is configuredfrom a PFC circuit 41 and a control unit 42.

The PFC circuit 41 comprises a master-side choke coil L_(10M) and amaster-side reflux output diode D_(10M) which are connected seriallybetween the positive-side output terminal of the full wave rectificationunit 4 and the positive-side input terminal of the DC/DC conversion unit6. Moreover, a master-side switching element Q_(10M) is connectedbetween a connection midpoint of the master-side choke coil L_(10M) andthe master-side reflux output diode D_(10M), and the ground line 15.

The master-side switching element Q_(10M) is configured, for example, aswith the switching element Q₁ of the first embodiment, from a MOS-FET, adrain is connected to the connection midpoint of the master-side chokecoil L_(10M) and the master-side rectification output diode D_(10M), anda source is connected to the ground line 15. Moreover, a gate of themaster-side switching element Q_(10M) is connected to the control unit42.

In addition, a master-side current detector 12M for detecting the coilcurrent I_(LM) that is generated in the master-side choke coil L_(10M)based on the ON/OFF operation of the master-side switching elementQ_(10M) is provided between the positive-side output terminal of thefull wave rectification unit 4 and the master-side choke coil L_(10M).The master-side current detector 12M sends the detected coil currentI_(LM) as the master-side coil current detection signal S_(10M) to thecontrol unit 42.

Meanwhile, the PFC circuit 41 is provided with a slave-side choke coilL_(10S) and a slave-side reflux output diode D_(10S), which areconnected serially, in parallel with the master-side choke coil L_(10M)and the master-side reflux output diode D_(10M), and a slave-sideswitching element Q_(10S) is connected between the connection midpointof the slave-side choke coil L_(10S) and the slave-side rectificationoutput diode D_(10S), and the ground line 15.

The slave-side switching element Q_(10S) is configured, for example, aswith the master-side switching element Q_(10M), from a MOS-FET, a drainis connected to the connection midpoint of the slave-side choke coilL_(10S) and the slave-side reflux output diode D_(10S), and a source isconnected to the ground line 15. Moreover, a gate of the slave-sideswitching element Q_(10S) is connected to the control unit 42.

In addition, a slave-side current detector 12S for detecting the coilcurrent I_(LS) that is generated in the slave-side choke coil L_(10S)based on the ON/OFF operation of the slave-side switching elementQ_(10S) is provided between the positive-side output terminal of thefull wave rectification unit 4 and the slave-side choke coil L_(10S).The slave-side current detector 12S sends the detected coil currentI_(LS) as the slave-side coil current detection signal S_(10S) to thecontrol unit 42.

The control unit 42 generates a master-side PWM signal S_(11M) as shownin FIG. 9(C) and a slave-side PWM signal S_(11S) as shown in FIG. 9(D)in which the phase has shifted 180 degrees in relation to themaster-side PWM signal S_(11M) based on the master-side coil currentdetection signal S_(10M) and the slave-side coil current detectionsignal S_(10S) which are respectively provided from the master-sidecurrent detector 12M and the slave-side current detector 12S, the firstpartial pressure voltage V₁₀ provided from the first partial pressureresistor 13, and the second partial pressure voltage V₁₁ provided fromthe second partial pressure resistor 14, applies the master-side PWMsignal S_(11M) to the gate of the master-side switching element Q_(10M),and applies the slave-side PWM signal S_(11M) to the gate of theslave-side switching element Q_(10S).

In the foregoing configuration, in the PFC unit 40, the input voltage V₂provided from the full wave rectification unit 4 is applied to themaster-side choke coil L_(10M) and the slave-side choke coil L_(10S) ofthe PFC circuit 41, respectively.

Here, the master-side switching element Q_(10M) is subject to the ON/OFFoperation based on the master-side PWM signal S_(11M) provided from thecontrol unit 42, and the master-side coil current I_(LM) of the criticalmode as shown in FIG. 9(A) is generated in the master-side choke coilL_(10M) pursuant to the ON/OFF operation of the master-side switchingelement Q_(10M). Similarly, here, the slave-side switching elementQ_(10S) is subject to the ON/OFF operation based on the slave-side PWMsignal S_(11S) that is provided from the control unit 42, and theslave-side coil current I_(LS) of the critical mode as shown in FIG.9(B) is generated in the slave-side choke coil L_(10S) pursuant to theON/OFF operation of the slave-side switching element Q_(10S).

The master-side coil current I_(LM) and the slave-side coil currentI_(LS) are subsequently rectified in the corresponding master-sidereflux output diode D_(10M) or the slave-side reflux output diodeD_(10S) and thereafter synthesized, and the thus obtained rectificationcoil signal is smoothed in the output smoothing capacitor C₁ and outputto the DC/DC conversion unit 6.

(2-2) Configuration of Control Unit (2-2-1) Principle of PFC Control ofPresent Embodiment

Meanwhile, in the PFC control according to the foregoing interleavesystem, it is necessary to cause the current distribution of themaster-side and the slave-side to be equal. In other words, as shown inFIG. 10(A), the phase difference between the master-side coil currentI_(LM) generated in the master-side choke coil L_(10M) and theslave-side coil current I_(LS) generated in the slave-side choke coilL_(10S) must be accurately 180 degrees. Note that the arrow of FIG.10(B) shows the timing of sampling that is executed in the control unit42 in order to perform digital control.

Nevertheless, due to differences in the characteristics between therespective parts of the master-side (choke coil, switching element andthe like) and the corresponding parts of the slave-side, there are caseswhere the phase difference between the master-side coil current I_(LM)and the slave-side coil current I_(LS) does not accurately become 180degrees. In the foregoing case, the current ratio of the master-side andthe slave-side will collapse and stress of the parts will be applied toeither the master-side or the slave-side, and, in a worst case scenario,the control will become unstable.

Here, FIG. 11(A) shows an example where the phase difference between themaster-side coil current I_(LM) generated in the master-side choke coilL_(10M) and the slave-side coil current I_(LS) generated in theslave-side choke coil L_(10S) deviates from 180 degrees. Moreover, FIG.11(B) shows the timing of the sampling that is executed in the controlunit 42 for performing digital control.

In FIG. 11(A), the following formula is hypothesized with the rate ofincrease (inclination of the corresponding straight line of FIG. 11) ofthe master-side coil current I_(LM) in the period that the master-sidecoil current I_(LM) increases as m₁ _(—) _(ILM) (refer to FIG. 10), andthe rate of increase (inclination of the corresponding straight line ofFIG. 11) of the slave-side coil current I_(LS) in the period that theslave-side coil current I_(LS) increases as m₁ _(—) _(ILS) (refer toFIG. 10).

[Formula 15]

m₁ _(—) _(ILM)≅m₁ _(—) _(ILS)=m₁  (15)

Moreover, in FIG. 11(A), the following formula is hypothesized with therate of decrease (inclination of the corresponding straight line of FIG.11) of the master-side coil current I_(LM) in the period that themaster-side coil current I_(LM) decreases as −m₂ _(—) _(ILM) (refer toFIG. 10), and the rate of decrease (inclination of the correspondingstraight line of FIG. 11) of the slave-side coil current I_(LS) in theperiod that the slave-side coil current I_(LS) decreases as −m₂ _(—)_(ILS) (refer to FIG. 10).

[Formula 16]

m₂ _(—) _(ILM)≅m₂ _(—) _(ILS)=m₂  (16)

In addition, upon referring to FIG. 11(A), the following formula isrealized.

[Formula 17]

|−m ₂ ·ΔT _(on) [n]|+m ₁ ·ΔT _(on) [n]=ΔI _(L) [n]  (17)

Note that, in Formula (17), ΔT_(on)[n] shows the temporal shift from thecorrect timing of the ON time T_(on)[n] of the slave-side coil currentI_(LS) in the case of FIG. 11(A). Moreover, ΔI_(L)[n] shows the leveldifference between the master-side coil current I_(LM) and theslave-side coil current I_(LS) at the n-th sampling timing (arrow ofFIG. 11(B)) in the case of FIG. 11(A).

Here, upon solving Formula (17) above regarding temporal shiftΔT_(on)[n], the following formula is realized.

$\begin{matrix}\lbrack {{Formula}\mspace{14mu} 18} \rbrack & \; \\{{\Delta \; {T_{on}\lbrack n\rbrack}} = \frac{\Delta \; {I_{L}\lbrack n\rbrack}}{m_{2} + m_{1}}} & (18)\end{matrix}$

Formula (18) can be modified as the following formula based on Formula(8) and Formula (9) above.

$\begin{matrix}\lbrack {{Formula}\mspace{14mu} 19} \rbrack & \; \\{{\Delta \; {T_{on}\lbrack n\rbrack}} = {\frac{\Delta \; {I_{L}\lbrack n\rbrack}}{m_{2} + m_{1}} = {\frac{L}{V_{out}} \cdot ( {{I_{LS}\lbrack n\rbrack} - {I_{LM}\lbrack n\rbrack}} )}}} & (19)\end{matrix}$

In Formula (19), I_(LM)[n] shows the value of the master-side coilcurrent I_(LM) at the n-th sampling timing (arrow of FIG. 11(B)), andI_(LS)[n] shows the value of the slave-side coil current I_(LS) at then-th sampling timing.

Accordingly, as a result of adding the temporal shift ΔT_(on)[n]represented with Formula (19) to the slave-side ON time command value,it is possible to obtain the slave-side ON time command value(hereinafter referred to as the “slave-side ON time command value”)T_(on) _(—) _(com,S) in which the phase difference between themaster-side coil current I_(LM) and the slave-side coil current I_(LS)has been corrected to be accurately 180 degrees. Note that theslave-side ON time command value T_(on) _(—) _(com,S) can be representedwith the following formula with the sampling period designated value asV_(m), and the master-side ON time command value (hereinafter referredto as the “master-side ON time command value”) as T_(on) _(—) _(com,M).

[Formula 20]

T _(on) _(—) _(com,S) [n]=V _(m) [n]−T _(on) _(—) _(com,M) [n]+ΔT _(on)[n−1]  (20)

(2-2-2) Configuration of Control Unit

FIG. 12, which uses the same reference numerals for the portionscorresponding to FIG. 5, shows the configuration of the control unit 42according to the second embodiment that was configured in considerationof the foregoing points. The control unit 42 comprises, as with thecontrol unit 11 (FIG. 5) according to the first embodiment, ananalog/digital conversion unit 20, an OFF time prediction unit 21, an ONtime control unit 22, an adding circuit 23 and a PWM generation unit 54.Moreover, the control unit 42 according to this embodiment comprises, inaddition to the foregoing configuration, a slave-side ON time correctionunit 51, a slave-side ON time arithmetic unit 52 and an adding circuit53.

The analog/digital conversion unit 20 analog-digital converts the firstpartial pressure voltage V₁₀ provided from the first partial pressureresistor 13 (FIG. 8) and the master-side coil current detection signalS_(10M) provided from the master-side current detector 12M (FIG. 8),respectively, based on a notification that is provided from the carriergeneration unit 33 (FIG. 13) of the PWM generation unit 54 as describedlater.

The analog/digital conversion unit 20 sends the first partial pressurevoltage value VV₁₀ as the sampled value of the first partial pressurevoltage V₁₀ obtained with the foregoing sampling to the OFF timeprediction unit 21, and sends the master-side coil current detectionvalue VS_(10M) as the sampled value of the master-side coil currentdetection signal S_(10M) to the OFF time prediction unit 21 and theslave-side ON time correction unit 51.

Moreover, the analog/digital conversion unit 20 samples the secondpartial pressure voltage V₁₁ provided from the second partial pressureresistor 14 (FIG. 8) at the same timing as the first partial pressurevoltage V₁₀ and the master-side coil current detection signal S_(10M),and sends the thus obtained second partial pressure voltage value VV₁₁as the sampled value of the second partial pressure voltage V₁₁ to theOFF time prediction unit 21 and the ON time control unit 22.

In addition, the analog/digital conversion unit 20 analog/digitalconverts the slave-side coil current detection signal S_(10S) providedfrom the slave-side current detector 12S (FIG. 8), and sends the thusobtained slave-side coil current detection value VS_(10S) to theslave-side ON time correction unit 51.

The ON time control unit 22, as with the first embodiment, calculatesthe target value of the ON time of the master-side in the subsequentsampling period, and outputs this as the master-side ON time commandvalue T_(on) _(—) _(com,M) to the OFF time prediction unit 50, onesignal input port of the adding circuit 23, the PWM generation unit 54and the slave-side ON time arithmetic unit 52, respectively.

The OFF time prediction unit 21 predicts, using foregoing Formula (10),the OFF time of the master-side for performing the critical mode controlin the subsequent sampling period based on the first partial pressurevoltage value W₁₀, the master-side coil current detection value VS_(10M)and the second partial pressure voltage value VV₁₁ provided from theanalog/digital conversion unit 20, and the master-side ON time commandvalue T_(on) _(—) _(com,M) provided from the ON time control unit 22.The OFF time prediction unit 50 thereafter outputs the thus obtainedprediction value of the OFF time of the master-side in the subsequentsampling period as the master-side OFF time command value T_(off) _(—)_(com,M) to the other signal input port of the adding circuit 23.

The adding circuit 23 calculates the sampling period provided in Formula(11) by adding the master-side ON time command value T_(on) _(—)_(com,M) provided from the ON time control unit 22, and the master-sideOFF time command value T_(off) _(—) _(com,M) provided from the OFF timeprediction unit, and sends the calculation result as the sampling periodcommand value V_(m) to the PWM generation unit 54 and the slave-side ONtime arithmetic unit 52, respectively.

The slave-side ON time correction unit 51 calculates the foregoingslave-side ON time correction value ΔT_(on)[n] explained with referenceto Formula (19) based on the master-side coil current detection valueVS_(10M) and the slave-side coil current detection value VS_(10S)provided from the analog/digital conversion unit 20, and sends theobtained slave-side ON time correction value ΔT_(on)[n] to one signalinput port of the adding circuit 53.

Moreover, here, the slave-side ON time arithmetic unit 52 calculates theslave-side ON time command value based on the master-side ON timecommand value T_(on) _(—) _(com,M) provided from the ON time controlunit 22, and the sampling period command value V_(m) provided from theadding circuit 23, and sends the ON time command value to the othersignal input port of the adding circuit 53.

The adding circuit 53 generates the slave-side ON time command valueT_(on) _(—) _(com,S) provided in Formula (20) above subject to phasecompensation by adding the slave-side ON time correction value ΔT_(on)provided from the slave-side ON time correction unit 51 to the ON timecommand value provided from the slave-side ON time arithmetic unit 52,and sends this to the PWM generation unit 54.

The PWM generation unit 54 is configured, as shown in FIG. 13, from acarrier generation unit 33, a master-side comparing unit 60M, aslave-side comparing unit 60S, a master-side output unit 61M and aslave-side output unit 61S.

The carrier generation unit 33, as shown in FIG. 9(E) and as with thefirst embodiment, generates a triangle wavelike carrier wave CA with apeak value V_(mp) according to the sampling period command value V_(m)provided from the adding circuit 23, and sequentially sends the levelvalue of the carrier wave CA to the master-side comparing unit 60M andthe slave-side comparing unit 60S in the internal clock cycle.

Moreover, the carrier generation unit 33 notifies the timing that thelevel value (count value) of the carrier wave CA becomes zero (timing ofthe arrow shown in FIG. 9(F)) to the analog/digital conversion unit 20.Consequently, the analog/digital conversion unit 20 samples the firstpartial pressure voltage V₁₀, the second partial pressure voltage V₁₁,the master-side coil current detection signal S_(10M) and the slave-sidecoil current detection signal S_(10S) at the notified timing.

The master-side comparing unit 60M compares the size of the level valueof the carrier wave provided from the carrier generation unit 33 and themaster-side ON time command value T_(on) _(—) _(com,M) provided from theON time control unit, and sends the comparative result to themaster-side output unit 61M.

The master-side output unit 61M subsequently generates a master-side PWMsignal S_(11M) as shown in FIG. 9(C) which rises to a high level duringthe period that the master-side ON time command value T_(on) _(—)_(com,M) is lower than the level value of the carrier wave and whichfalls to a low level during the period that the master-side ON timecommand value T_(on) _(—) _(com,M) is higher than the level value of thecarrier wave based on the comparative result of the master-sidecomparing unit 60M, and sends the generated master-side PWM signalS_(11M) to the gate of the master-side switching element Q_(11M).

Consequently, the master-side switching element Q_(11M) is subject tothe ON/OFF operation based on the master-side PWM signal S_(11M), andthe master-side coil current I_(LM) as shown in FIG. 9(A) is generatedin the foregoing master-side choke coil L_(10M) pursuant to the ON/OFFoperation of the master-side switching element Q_(11M).

Moreover, the slave-side comparing unit 60S compares the size of thelevel value of the carrier wave provided from the carrier generationunit 33 and the slave-side ON time command value T_(on) _(—) _(com,S)provided from the slave-side ON time arithmetic unit 52 (FIG. 12), andsends the comparative result to the slave-side output unit 61S.

The slave-side output unit 61S subsequently generates a slave-side PWMsignal S_(11S) as shown in FIG. 9(D) which rises to a high level duringthe period that the slave-side ON time command value T_(on) _(—)_(com,S) is higher than the level value of the carrier wave and whichfalls to a low level during the period that the slave-side ON timecommand value T_(on) _(—) _(com,S) is lower than the level value of thecarrier wave based on the comparative result of the slave-side comparingunit 60S, and sends the generated slave-side PWM signal S_(11S) to thegate of the slave-side switching element Q_(10S).

Consequently, the slave-side switching element Q_(10S) is subject to theON/OFF operation based on the slave-side PWM signal S_(11s), and theslave-side coil current I_(LS) with a phase difference of 180 degreesfrom the master-side coil current I_(LM) as shown in FIG. 9(B) isgenerated in the foregoing slave-side choke coil L_(10S) pursuant to theON/OFF operation of the slave-side switching element Q_(10S).

(2-3) Effect of Present Embodiment

As described above, the PFC unit 40 according to this embodiment, aswith the PFC unit 5 according to the first embodiment, predicts the OFFtime of the master-side for performing the critical mode control in thesubsequent sampling period based on the first partial pressure voltagevalue W₁₀, the master-side coil current detection value VS_(10M) and thesecond partial pressure voltage value W_(vi) provided from theanalog/digital conversion unit 20, and the master-side ON time commandvalue T_(on) _(—) _(com,M) provided from the ON time control unit 22,and additionally corrects the phase of the slave-side PWM signal _(S11S)in the slave-side ON time correction unit 51 and the slave-side ON timearithmetic unit 52. Thus, the phase of the slave-side PWM signal _(S11S)can be retained with accuracy as a phase difference of 180 degrees inrelation to the master-side PWM signal _(S11M).

Consequently, the output voltage oscillation or output ripple of the PFCunit 40 can be suppressed, and a stable output can be obtained as theoutput of the power supply unit 1.

(2) Other Embodiments

Although the foregoing first embodiment explained a case of detectingthe current value of the coil current IL that is generated in the chokecoil L1 with the current detector 12, and performing the PFC controlaccording to the foregoing embodiment based on the detected currentvalue of the coil current IL, the present invention is not limitedthereto, and, for example, as shown in FIG. 14, it is also possible toconnect a resistor R10 between the source of the switching element Q1and the ground line 15, acquire an inductor current Ids (drain-sourcecurrent of Q1) flowing in the switching element Q1 from the connectionmidpoint of the source of the switching element Q1 and the resistor R10,and perform the PFC control according to the foregoing embodiment basedon the inductor current Ids.

This also applied to the second embodiment. However, in the foregoingcase, as evident from FIG. 9, sampling is performed at the wave troughof the carrier wave CA, and, as the master-side coil current I_(LM), avalue at the rise of the coil current (that is, at a timing that isexactly ½ of the ON period of the master-side PWM signal S_(11M)) can beacquired. Meanwhile, the slave-side coil current I_(LS) is sampled atthe fall of the coil current. This means that, considering that theinductor current Ids will be a sawtooth current waveform, it will not bepossible to detect the current at the fall. Thus, in the foregoing case,if a sample value of only the slave-side current detector 12S isacquired at a timing of a half cycle before (detection of themaster-side current is one cycle before) (that is, at the wave crest ofthe carrier wave CA), the current can be detected at the rise as withthe master-side coil current I_(LM).

Moreover, although the foregoing second embodiment explained a casewhere, in the control unit 42, the phase of the slave-side PWM signalS_(11S) is corrected so that the phase of the slave-side PWM signalS_(11S) is shifted 180 degrees in relation to the master-side PWM signalS_(11M) with the master-side as the reference, the present invention isnot limited thereto, and, for example, the phase of the master-side PWMsignal S_(11M) may be corrected such as the phase of the slave-side PWMsignal S_(11M) is shifted 180 degrees in relation to the slave-side PWMsignal S_(11S) with the slave-side as the reference.

In addition, although the foregoing first and second embodimentsexplained a case of configuring the input voltage detection unit fordetecting the input voltage from the first and second partial pressureresistors R₁, R₂, and configuring the output voltage detection unit fordetecting the output voltage from the third and fourth partial pressureresistors R₃, R₄, the present invention is not limited thereto, andvarious types of configurations may be broadly applied as theconfiguration of the input voltage detection unit and the output voltagedetection unit.

In addition, although the foregoing first and second embodimentsexplained a case of predicting the OFF time in the subsequent periodbased on Formula (10), the present invention is not limited thereto, andthe OFF time in the subsequent sampling period may also be predictedusing various other computation methods.

1. A power factor correction device including a coil and a switchingelement, and a control unit for controlling ON/OFF of the switchingelement, comprising: an input voltage detection unit for detecting aninput voltage of the power factor correction device; an output voltagedetection unit for detecting an output voltage; and a coil currentdetection unit for detecting a coil current that is generated in thecoil pursuant to the ON/OFF operation of the switching element, whereinthe control unit predicts an OFF time of the switching element of eachswitching cycle for controlling the switching element in a critical modebased on a voltage value of the input voltage detected with the inputvoltage detection unit, a voltage value of the output voltage detectedwith the output voltage detection unit, and a current value of the coilcurrent detected with the coil current detection unit, and controls theON/OFF of the switching element based on the prediction result.
 2. Thepower factor correction device according to claim 1, wherein the controlunit predicts an OFF time T_(off)[n+1] of the (n+1)-th switching elementaccording to the following formula with the voltage value of the inputvoltage at the n-th sampling timing as V_(in)[n], the output voltage asV_(out)[n], the current value of the coil current as I_(L)[n], an ONtime of the switching element as T_(on)[n], and inductance of the coilas L. $\begin{matrix}{\mspace{79mu} \lbrack {{Formula}\mspace{14mu} 21} \rbrack} & \; \\{{T_{off}\lbrack {n + 1} \rbrack} = {{\frac{L}{{V_{out}\lbrack n\rbrack} - {V_{in}\lbrack n\rbrack}} \cdot {I_{L}\lbrack n\rbrack}} + {\frac{V_{in}\lbrack n\rbrack}{2( {{V_{out}\lbrack n\rbrack} - {V_{in}\lbrack n\rbrack}} )} \cdot {T_{on}\lbrack n\rbrack}}}} & (21)\end{matrix}$
 3. The power factor correction device according to claim1, wherein the coil, the switching element and the coil currentdetection unit are respectively provided to a master-side and aslave-side, and wherein, based on the voltage value of the input voltagedetected with the input voltage detection unit, the voltage value of theoutput voltage detected with the output voltage detection unit, and thecurrent value of the coil current detected with the one coil currentdetection unit of the master-side or the slave-side, the control unitpredicts an OFF time of the one switching element of the master-side orthe slave-side of each switching cycle for controlling the switchingelement in a critical mode, and controls the ON/OFF of each of theswitching elements of the master-side and the slave-side based on theprediction result.
 4. The power factor correction device according toclaim 1, wherein the switching elements of the master-side and theslave-side are subject to the ON/OFF operation based on a pulse-widthmodulated drive signal applied from the control unit, and wherein, basedon the respective coil currents of the master-side and the slave-sidethat were detected with the respective coil current detection units ofthe master-side and the slave-side in a previous sampling period, thecontrol unit corrects a phase of the drive signal to be applied to theother switching element of the slave-side or the master-side so that theother switching element of the slave-side or the master-side is subjectto the ON/OFF operation with a phase difference of 180 degrees inrelation to the ON/OFF operation of the one switching element of themaster-side or the slave-side.
 5. A control method of a power factorcorrection device including a coil and a switching element, and acontrol unit for controlling ON/OFF of the switching element, whereinthe power factor correction device comprises: an input voltage detectionunit for detecting an input voltage of the power factor correctiondevice; an output voltage detection unit for detecting an outputvoltage; and a coil current detection unit for detecting a coil currentthat is generated in the coil pursuant to the ON/OFF operation of theswitching element, and wherein the control method comprises: a firststep of the control unit predicting an OFF time of the switching elementof each switching cycle for controlling the switching element in acritical mode based on a voltage value of the input voltage detectedwith the input voltage detection unit, a voltage value of the outputvoltage detected with the output voltage detection unit, and a currentvalue of the coil current detected with the coil current detection unit;and a second step of the control unit controlling the ON/OFF of theswitching element based on the prediction result.
 6. The control methodof a power factor correction device according to claim 5, wherein, atthe first step, control unit predicts an OFF time T_(off)[n+1] of the(n+1)-th switching element according to the following formula with thevoltage value of the input voltage at the n-th sampling timing asV_(in)[n], the output voltage as V_(out)[n], the current value of thecoil current as I_(L)[n], an ON time of the switching element asT_(on)[n], and inductance of the coil as L. $\begin{matrix}{\mspace{79mu} \lbrack {{Formula}\mspace{14mu} 22} \rbrack} & \; \\{{T_{off}\lbrack {n + 1} \rbrack} = {{\frac{L}{{V_{out}\lbrack n\rbrack} - {V_{in}\lbrack n\rbrack}} \cdot {I_{L}\lbrack n\rbrack}} + {\frac{V_{in}\lbrack n\rbrack}{2( {{V_{out}\lbrack n\rbrack} - {V_{in}\lbrack n\rbrack}} )} \cdot {T_{on}\lbrack n\rbrack}}}} & (22)\end{matrix}$
 7. The control method of a power factor correction deviceaccording to claim 5, wherein the power factor correction devicecomprises the coil, the switching element and the coil current detectionunit respectively on a master-side and a slave-side, wherein, at thefirst step, based on the voltage value of the input voltage detectedwith the input voltage detection unit, the voltage value of the outputvoltage detected with the output voltage detection unit, and the currentvalue of the coil current detected with the one coil current detectionunit of the master-side or the slave-side, the control unit predicts anOFF time of the one switching element of the master-side or theslave-side of each switching cycle for controlling the switching elementin a critical mode, and wherein, at the second step, the control unitcontrols the ON/OFF of each of the switching elements of the master-sideand the slave-side based on the prediction result.
 8. The control methodof a power factor correction device according to claim 5, wherein theswitching elements of the master-side and the slave-side are subject tothe ON/OFF operation based on a pulse-width modulated drive signalapplied from the control unit, and wherein, at the second step, based onthe respective coil currents of the master-side and the slave-side thatwere detected with the respective coil current detection units of themaster-side and the slave-side in a previous sampling period, thecontrol unit corrects a phase of the drive signal to be applied to theother switching element of the slave-side or the master-side so that theother switching element of the slave-side or the master-side is subjectto the ON/OFF operation with a phase difference of 180 degrees inrelation to the ON/OFF operation of the one switching element of themaster-side or the slave-side.